The majority of devices that we use today, will use the Von Neumann Architecture to run the Fetch Decode Execute Cycle that allows the processor to run instructions. The Von Neumann Architecture is often referred to as the Stored Program Concept – what this means is that both the instructions and the data are stored in the same format… binary!
Each instruction is given a unique bit pattern that matches the instruction, so if the instruction ADD had a bit pattern of 1010, the full instruction 10100001 could be decoded into ADD (1010) 1 (0001).
Each processor type has its own set of these instructions called an instruction set and it if for this reason that once you have compiled a program to an executable file, it can only run on the platform that you compiled it for.
In the Von Neumann Architecture, a set of special memory locations are used to fetch, decode, and execute instructions. These are known as registers – each register has a specific purpose within the cycle.
- PC (Program Counter)
- Holds the address of the next instruction to be processed
- This is passed to the MAR
- MAR (Memory Address Register)
- Holds the address of the instruction to be processed
- MDR (Memory Data Register – aka Memory Buffer Register)
- Initially holds the instruction found at the address in the MAR
- Then later, is used to store any data (operand) needed for the instruction
- CIR (Current Instruction Register)
- Holds the instruction (opcode) currently being processed
- Holds the outcome of the instruction
- Can act like a running total in a calculator as more instructions are processed
Sign in with your A Level Account for more in-depth information including why pipelining makes a processor more efficient, and how to compare the Von Neumann Architecture to the Harvard Architecture.
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