1.1 The characteristics of contemporary processors, input, output and storage devices
1.2 Software and Software Development
1.3 Exchanging Data
1.4 Data Structures & Types
1.5 Legal, Moral, Cultural, and Ethical Issues
2.1 Elements of Computational Thinking
2.2 Programming Techniques & Methods
2.3 Algorithms
The Programming Project (NEA)

Von Neumann & Harvard Architectures

The majority of devices that we use today, will use a contemporary architecture which is a combination of both the Von Neumann and Harvards Architectures to run the Fetch Decode Execute Cycle alongside other more complex methods of dealing with instructions.

The Von Neumann Architecture

The Von Neumann Architecture is often referred to as the Stored Program Concept – what this means is that both the instructions and the data are stored in the same format… binary!

Each instruction is given a unique bit pattern that matches the instruction, so if the instruction ADD had a bit pattern of 1010, the full instruction 10100001 could be decoded into ADD (1010) 1 (0001).

Computer architecture - Computer Science revision

Each processor type has its own set of these instructions called an instruction set and it if for this reason that once you have compiled a program to an executable file, it can only run on the platform that you compiled it for.

In the Von Neumann Architecture, a set of special memory locations are used to fetch, decode, and execute instructions. These are known as registers – each register has a specific purpose within the cycle.

  • PC (Program Counter)
    • Holds the address of the next instruction to be processed
    • This is passed to the MAR
  • MAR (Memory Address Register)
    • Holds the address of the instruction to be processed
  • MDR (Memory Data Register – aka Memory Buffer Register)
    • Initially holds the instruction found at the address in the MAR
    • Then later, is used to store any data (operand) needed for the instruction
  • CIR (Current Instruction Register)
    • Holds the instruction (opcode) currently being processed
  • Accumulator
    • Holds the outcome of the instruction
    • Can act like a running total in a calculator as more instructions are processed

The Von Neumann Architecture & Fetch Decode Execute Scribbl.it Notes provide a structured way for you to revise topic areas in a visual way.

Harvard vs. Von Neumann Architectures

Whilst both the Harvard and von Neumann architectures run the fetch decode execute cycle, there is a reason for using each in different scenarios. As part of the A Level content you will be expected to compare each of these architectures using their differences and similarities.

cpu

The main difference between the two architectures is that in the Von Neumann architecture both the instructions and the data are stored in the same memory locations, whereas they are physically divided in Harvard. This produces both positive and negative impact.

Imagine the storage of memory a little bit like a box  – Von Neumann can make efficient use of the space as it only uses 1 box and therefore if the instructions take up less storage space but there is more data all of the space can be utilised within the available memory locations.

In Harvard, as the instructions and data would be stored in two separate boxes even if there was space left in the instruction box, when the data box becomes full there is no other space available.

Initially it may seem a sensible option to simply use the von Neumann architecture which makes efficient use of all the memory locations. However, the benefit of the Harvard system is that an instruction can never be mistaken for data or vice versa which is a possibility in the von Neumann architecture.

Other differences to consider is that in Harvard architecture, because the instructions and data are separate two control units are required, and as such to control buses are also required. This can make the architecture more expensive and more difficult to develop for.

The final difference between the two architectures is the type of system that they are implemented in. As a general rule (be aware that this is not always 100% the case, however for the purposes of the exam we assume that it is) general purpose systems, those that can be adjusted by adding more software such as desktops and laptops, will use the von Neumann architecture as they have operating systems that are able to deal with any missed communication when data or instructions are mixed up. In contrast, Harvard architectures are found in embedded systems which are systems developed for one particular purpose ranging from very simple systems like microwaves to more complex single purpose systems like Sat Navs.  

Pipelining

In a similar way to parallel processing, pipelining allows The CPU to perform in a more efficient fashion. When a processor makes use of pipelining, instead of executing instructions in parallel it creates a system which allows the processor to be executing one instruction whilst another is being decoded comma and another is being fetched. This system is like a construction line with multiple stages all being run at once.

turn left

Pipelining allows the processor to be constantly looking ahead to the next instruction. This system works particularly well when a task requires a set of linear instructions to be performed. However, it does not work as well when the outcome of one instruction directly impacts upon what needs to be fetched in the next cycle, And much like with parallel processing is not appropriate for every task but does make the system quicker in overall.

Activity – Exam Style Question

Explain why the Von Neumann architecture may be used instead of the Harvard Arctitecture.

[2 marks]

Show Answer

One for identification, one for expansion:

  • Memory is used more efficiently
    • … because instructions & data are stored in the same location

Note: the term instruction must be used. words such as tasks are too vague (TV)

Activity – Exam Style Question

Explain why pipelining is not considered a form of parallel processing.

[2 marks]

Show Answer

One mark per point – Max 2:

  • Pipelining allows parts of the FDE cycle to run at the same time
  • … but does not allow multiple instructions to run at once
  • In parallel processing, multiple instructions are able to be run at the same time

Note: the term instruction must be used. words such as tasks are too vague (TV)

Activity – Scribbl.it Notes

Activity – Scribbl.it Notes

Activity – Scribbl.it Notes

You don’t have to be an artist as it’s all been drawn out for you (or you can use this as inspiration to create your own!). Print the notes, then colour in areas of importance, add doodles and colour, then add more detail to the notes page being as creative as possible.